AEG SB4 series User Manual Page 251

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23
COP 82
203
3.2 Data Back-Up
The “B” layout jumper (I in Figure 106) connects the CMOS supply lines of MSBT (pas-
sive PMB) and CBT (active PMB of the COP 82). The “passive PMB” and the un-
coupled “active PMB” are connected to a common backup battery for CMOS RAM with
jumper “B”. If the “B” layout jumper is disconnected, a second backup battery can be
connected to terminals a04 (+) and a01 (-) of the 64 pole PMB
-connector for the “active
PMB”. A regular replacement is to be ensured if a suitable dry battery is used. If a sec-
ond rechargable battery is used, a charging circuit is to be provided (ALU charges the
1st rechargable battery only).
3.3 Address Area Setting
The address of the dual port memory are on the passive PMB is set with plug-in jump-
ers A18 ... A14in accordance with the controller module.
Table 54 Setting the Address Area on the COP 82
A18 A17 A16 A15 A14 Segm. Address area
1 00 000 - 07 FFF
2 08 000 - 0F FFF
3 10 000 - 17 FFF
4 18 000 - 1F FFF
5 20 000 - 27 FFF
6 28 000 - 2F FFF
7 30 000 - 37 FFF
8 38 000 - 3F FFF
9 40 000 - 47 FFF
10 48 000 - 4F FFF
11 50 000 - 57 FFF
12 58 000 - 5F FFF
13 60 000 - 67 FFF
14 68 000 - 6F FFF
15 70 000 - 77 FFF
16 78 000 - 7F FFF
17 80 000 - 87 FFF
18 88 000 - 8F FFF
19 90 000 - 97 FFF
20 98 000 - 9F FFF
21 A0 000 - A7 FFF
22 A8 000 - AF FFF
23 B0 000 - B7 FFF
24 B8 000 - BF FFF
25 C0 000 - C7 FFF
26 C8 000 - CF FFF
27 D0 000 - D7 FFF
28 D8 000 - DF FFF
29 E0 000 - E7 FFF
30 E8 000 - EF FFF
31 F0 000 - F7 FFF
32 F8 000 - FF FFF
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